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Low-Temperature 3D Chip Stacking Points to a New Path for Silicon Scaling
Researchers at the University of Illinois Urbana-Champaign say they can stack high-performance silicon at low temperatures with near-perfect yields.
Key Takeaways
- Researchers reported monolithic 3D silicon chips built at low temperatures.
- The work is framed around near-perfect manufacturing yields.
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DT Editorial Team··via interestingengineering.com